AMD laid out more of its MI400 and Helios AI infrastructure at Hot Chips 2026, according to two live ServeTheHome reports from the conference. The company’s presentations covered both the Instinct MI455X accelerator architecture and the rack-scale system design AMD is building around it. ServeTheHome reports that AMD framed MI400 around a shift in AI infrastructure demand: from single-model training toward a mix of frontier training, enterprise fine-tuning and always-on inference. AMD’s stated argument was that model scale and workload variety make data movement, memory capacity and interconnect design central to the system, not secondary details. The headline Helios rack figures are large. According to ServeTheHome, AMD described a 72-GPU rack with 2.9 exaflops of claimed AI compute, 31 TB of HBM4 memory and 1.7 PB/s of HBM4 bandwidth. The same reports cite 260 TB/s of scale-up bandwidth and 43 TB/s of scale-out bandwidth per rack. The building block is a compute tray. ServeTheHome says each tray holds four AMD Instinct MI455X modules connected to a single AMD EPYC host CPU, with scale-up traffic carried over UALoE links and scale-out networking handled by AMD Pensando Vulcano 800 AI NICs. One report describes up to three Vulcano 800 AI NICs per MI455X module, while the Helios architecture report notes that two NICs per GPU is also an option. At the accelerator level, ServeTheHome reports that MI455X uses an enhanced modular chiplet design. The described package includes eight accelerator complex dies on N2, fabric and cache dies plus I/O dies on N3P, 256 active work group processors, 192 MB of global L2 cache and 12 HBM4 stacks. The reported memory configuration is 432 GB of HBM4 per MI455X at 23.3 TB/s. AMD also described the rack fabric in more detail. ServeTheHome reports that each MI455X receives 1.8 TB/s per direction of scale-up bandwidth, and that Helios uses a switched topology for all-to-all GPU connectivity across the 72-GPU pod. The Helios rack described in the report uses 18 compute trays and six switch trays in a 44OU ORW-HPR chassis, with liquid cooling, redundant power and a 50V DC busbar. The software layer is part of the pitch. ServeTheHome says AMD discussed ROCm in the MI400 architecture talk and later walked through UALoE and a shared-memory fabric model for Helios. That matters because AMD is presenting MI400 not merely as a faster GPU, but as a co-designed system spanning CPU host, GPU, networking and software. The evidence here is detailed but still single-publisher. ServeTheHome’s reports are consistent across the two AMD talks, but the cluster does not include an AMD primary post or a second independent outlet confirming the same specifications. For now, the safe read is that AMD disclosed the MI400/Helios architecture at Hot Chips 2026, with the specific figures attributed to ServeTheHome’s live coverage. Who benefits: AMD benefits if buyers view Helios as an integrated alternative for large AI deployments rather than a component-level GPU offering. Customers already invested in AMD EPYC, Instinct, Pensando or ROCm have the clearest path to evaluate the architecture. Who's exposed: The main exposure is execution risk for AMD’s system stack: silicon, networking, cooling, rack integration and ROCm all have to work together. Buyers comparing AI infrastructure will need independent performance, availability and software-readiness data before treating the disclosed figures as deployment outcomes.